1. Technical Field
The present invention relates to a PWM signal generating circuit that generates a rectangular wave signal (PWM signal) through pulse width modulation, and more particularly, to a PWM signal generating circuit that generates a plurality of PWM signals having different duty ratios, a printer including the PWM signal generating circuit, and a PWM signal generating method by the PWM signal generating circuit.
2. Description of the Related Art
Recently, there is a digital system to be used with generation of a PWM signal in order to carry out sequence control or to control rotation of a motor.
Patent Document 1 (Japanese Patent Application Publication No. 2008-244841-A1) describes a PWM signal generating circuit for generating a PWM signal which includes a counter for updating a count value based on an oscillation signal having a predetermined frequency, and an output circuit for changing the PWM signal into one of logic levels when the count value of the counter reaches a count value corresponding to a first predetermined value and changing the PWM signal into the other logic level when the count value of the counter reaches a count value corresponding to a second predetermined value. In particular, the output circuit includes a register to which a first predetermined value (a count value indicative of a rising position of the PWM signal) is set, a first comparator for comparing the first predetermined value with the count value, a register to which a second predetermined value (a count value indicative of a falling position of the PWM signal) is set, a second comparator for comparing the second predetermined value with the count value, and a T flip-flop for outputting the PWM signal. When an output signal of the first comparator makes a transition from L to H, an output signal of the T flip-flop subsequently makes a transition from L to H. When an output signal of the second comparator makes a transition from L to H, the output signal of the T flip-flop subsequently makes a transition from H to L. Consequently, a PWM signal having a duty ratio corresponding to a set value of the register is output. The invention disclosed in the Patent Document 1 may further include output circuits in order to generate the plurality of PWM signals. The count value of the counter is shared by the output circuits and a cycle of each of the PWM signals is equal to a cycle in which the count value of the counter is reset.
Patent Document 2 (Japanese Patent Application Publication No. 2007-104769-A1) describes a PWM signal generating device including an up-down counter to be operated based on a clock, a rewritable compare register for holding a compare value, a comparator for comparing the compare value of the compare register with a count value of the up-down counter to output a first coincidence signal in a count-up operation and a second coincidence signal in a count-down operation, an overhead bit register which is provided to change a pulse width of a PWM signal and serves to hold an overhead bit, and a PWM signal generator having a delay circuit for delaying either the first coincidence signal or the second coincidence signal depending on an overhead bit and serving to set a pulse width of a PWM signal based on one of the coincidence signals which is delayed by the delay circuit and the other coincidence signal which is not delayed. The delay circuit delays either the first coincidence signal or the second coincidence signal without using a clock having a higher frequency than a clock of the up-down counter and the PWM signal generator changes the pulse width of the PWM signal depending on the overhead bit. The invention disclosed in the Patent Document 2 generates a PWM signal by causing an output signal to make a transition from L to H when the count value is coincident with the compare value in the count-up operation of the up-down counter and causing the output signal to make a transition from H to L when the count value is coincident with the compare value in the count-down operation. However, a change in the pulse width of the PWM signal is always a double of a change in the compare value of the compare register. For this reason, a fall (or a rise) of the output signal is delayed depending on the overhead bit. Consequently, it is possible to finely set the pulse width of the PWM signal.
Patent Document 3 (Japanese Patent Application Publication No. 2011-087440-A1) describes a motor driving control device for causing cyclic current to flow to a coil having a plurality of phases of a motor including the coil, thereby driving a rotor of the motor rotatively, and the motor driving control device includes a position detector for outputting a position signal indicative of a rotating position of the rotor, a position change detector for outputting a position change signal indicative of a change in the rotating position of the rotor, a phase synchronization circuit for outputting absolute phase information in response to the position signal in phase synchronization with the position signal based on the position signal and the position change signal, and a driving controller for outputting a driving voltage signal to cause cyclic current to flow to the coil having the plurality of phases based on the absolute phase information. The invention disclosed in the Patent Document 3 includes a speed detector for detecting a frequency corresponding to a rotating speed of the rotor, and further includes a driving controller having a frequency error detector for detecting a frequency error between a target frequency corresponding to a target speed of the rotor and a frequency detected by the speed detector, a control voltage signal generator for generating a control voltage signal to drive the motor based on the frequency error, a sine wave generator for outputting a sine wave driving signal to cause sine wave-shaped current to flow to the coil having the plurality of phases based on the absolute phase information, and a sine wave amplitude modulator for modulating an amplitude of the sine wave driving signal in response to the control voltage signal, thereby generating a driving voltage signal.